GDA Announces Availability of PCI Express Gen 2 Controller IP

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Ideally suited for desktop, server, mobile, networking and telecom applications, GPEX-2 IP is targeted for end-point, root complex, switch and bridge implementation.

GDA Technologies, Inc., a Global Electronics Design services and IP provider, announced the immediate availability and shipment of the PCI Express Gen 2 Controller (GPEX-2) IP, ideally suited for desktop, server, mobile, networking and telecom applications.

GPEX-2 IP is a flexible and configurable design targeted for end-point, root complex, switch and bridge implementation. The controller's architecture is carefully crafted for optimal link utilization, latency, reliability, power consumption, and footprint.

"GDA's has been in the forefront of providing the most flexible IP solution to its customers for over 5 years," said VP and General Manager of IC and IP division at GDA, Ravi Thummarukudy. "GDA's exhaustive verification methodology and interoperability testing with leading PHY IP minimizes risk and reduces time to market for our customers who are designing high- performance Gen 2-based products."

GPEX-2 is part of the GDA's PCI Express (GPEX) family o

f PCI Express IP solutions which has been in production for over 3 years. The IP has the distinction of having maximum number of entries in the PCI Express integrators list, demonstrating compliance with PCISIG testing and universal interoperability with Industry standard PCI Express solutions.

The new PCI Express Gen 2 version is compatible with the earlier version of the GPEX IP which will allow smooth transition of existing designs. GDA also offers customization and integration design services for all the IP.

The GPEX-2 flexible backend architecture allows for easy integration into a wide range of applications. The IP is feature-rich, highly flexible, scalable and configurable and has a timing-friendly design. It supports a wide range of data widths (32, 64,128) and configurable lanes (x1,x2,x4,x8 and x16), and is independent of application logic, PHY designs, implementation tools and target technology.

The IP is an exhaustively verified solution which has bee

n fully tested against a design-specific and protocol compliance checklist.

The comprehensive directed and random tests ensure a very high coverage. The IP is verified with leading PCI Express verification IP's and the verification environment can be configured to run with all the major simulators.

The reusable block level verification environment and the formal verification methodology enhance the quality of verification process and add more confidence to the design verification. The GPEX-2 IP leverages years of GDA's experience in creating reusable IP such as Ethernet MAC (10/100/1G and 10G), Rapid IO (both serial and parallel), SPI4.2 and Hypertransport.