HyperTransport 3.0 Specification Released

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HyperTransport Technology Consortium, a standards organization dedicated to developing the industry's lowest latency, highest bandwidth interconnect technology,

HyperTransport Technology Consortium, a standards organization dedicated to developing the industry's lowest latency, highest bandwidth interconnect technology, has released version 3.0 of the HyperTransport specification. The new standard nearly doubles the bandwidth and speed of the previous HyperTransport 2.0 specification.

HyperTransport 3.0 also supports a variety of new features including AC coupling mode, hot plugging, un-ganging mode and dynamic power management for the support of extended signal transmission distance, typical of backplane and chassis-to-chassis implementations.


Version 3.0 builds on the existing HyperTransport 1.0 and 2.0 standards, and is fully backwards compatible with earlier versions of the HyperTransport specification standard.

"The added performance and new features of HyperTransport 3.0 extend the applicability of HyperTransport technology from chip-to-chip and board-to-board, all the way to chassis-to-chassis applications," sai

d Mario Cavalli, general manager of the HyperTransport Technology Consortium.

HyperTransport technology is deployed in applications ranging from high-performance embedded systems to personal computing, workstations, servers, supercomputers and clusters.

HyperTransport 3.0 extends the 1.4 GHz dual data rate (DDR) maximum clock of HyperTransport 2.0 to 1.8 GHz, 2 GHz, 2.4 GHz and 2.6 GHz, and delivers a maximum aggregate bandwidth of 41.6 GBps, a bandwidth increase of 86% over HyperTransport 2.0.

Technical features and benefits of HyperTransport 3.0 include:
AC mode (Optional): An AC interconnect mode complements HyperTransport's traditional DC mode, featuring capacitor coupling, AC/DC auto-sensing and auto-configuring capabilities. The feature extends HyperTransport's maximum signal transmission distance to 1 meter at maximum specified clock speed with no signal transmission or performance degradation. As a result, the HyperTransport standard can now support lo

ng-haul signal transmission typical of backplane and chassis-to-chassis applications. During power-up and in total transparency to system software, HyperTransport 3.0 auto-senses the presence of coupling capacitors (AC) and/or direct connections (DC) within the HyperTransport interconnect fabric and automatically configures each portion of it accordingly.

- Hot plugging: HyperTransport technology-enabled devices can be added to or removed from the HyperTransport fabric without disrupting system operations. HyperTransport cards, systems and subsystems can therefore be deployed in backplane and any mission-critical platforms requiring high system availability.

- Un-ganging mode (Optional): During system power-up and transparently to system software, 1x16 HyperTransport links can optionally be configured as 2x8 virtual links. This gives system architects extended interconnect flexibility and the ability to fully leverage existing HyperTransport components and cores. Un-gangi

ng mode is particularly valuable in multiprocessor and symmetric multiprocessing environments.

- Power Management Mode: HyperTransport 3.0 carries dynamic, auto-sensing, hardware-based, self-configuring power management capabilities that give end products the intelligence to best optimize the power consumption of each of their HyperTransport components and modules in real-time and transparently to operating system and application software.

The HyperTransport Consortium has also released the HyperTransport HTX connector specification that enables system designers to link high-performance peripheral subsystems directly to the system's CPU or CPUs via low-latency HyperTransport links. The HyperTransport HTX connector makes compute intensive CPU-to-I/O and board-to-board designs a reality for a full range of new-generation high performance peripheral functions, such as server clustering, network security, real-time data analysis and routing, storage management, math algorithm

s acceleration, encryption/decryption, advanced 3D rendering and live video processing, medical imaging and other compute-intensive co-processing functions.

HyperTransport technology is natively embedded in multiple CPU families from AMD, Broadcom, IBM, NetLogic Microsystems, PMC-Sierra, Raza Microelectronics and Transmeta and in a variety of semiconductors and IP cores. It is fully software-compatible with legacy Peripheral Component Interconnect (PCI), PCI-X and PCI Express technologies.

HyperTransport technology-enabled devices are deployed in high-profile products in networking, consumer, personal computers, workstations, servers and supercomputers from a wide range of companies including Apple, Cisco, Cray, HP, Fujitsu-Siemens, IBM, Lenovo, Microsoft, Sharp, Sun and all PCs, servers and cluster workstations based on AMD Sempron, AMD Athlon 64 and AMD Opteron processors, as well as AMD Turion 64 Mobile Technology and Transmeta Efficeon processors.